1. Logic-timing simulation and the degradation delay mode
Author: / Manuel J. Bellido, Jorge Juan, Manuel Valencia
Library: Central Library and Document Center of Shahid Chamran University (Khuzestan)
Subject: Computer simulation.,Mathematical models.
Classification :
TK
,
7868
,.
T5
,
B45
,
2006eb
2. Logic-timing simulation and the degradation delay model /
Author: Manuel J. Bellido, Jorge Juan, Manuel Valencia.
Library: Center and Library of Islamic Studies in European Languages (Qom)
Subject: Computer simulation.,Mathematical models.,Computer simulation.,COMPUTERS-- Computer Simulation.,Mathematical models.
Classification :
TK7868
.
T5
B45
2006eb
